To achieve increased density and performance of integrated circuits (ICs), the characteristic size of features on those circuits is decreased. Fabrication of IC devices introduces new challenges in process development and control.
During fabricating features, such as through-silicon vias (TSVs) and trench capacitors, the fabricating process may include forming trenches or holes in a substrate and then filling materials in the trenches or holes. Additional metal lines and/or metal pads are then formed over and electrically coupled to the TSVs, for example, using damascene processes. TSVs may also be formed after all metal layers and passivation layers are formed, and may be formed from the front side or the back side of the respective wafers/chips, which approaches are referred to as via-last approaches.